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 Features
General
* High-performance, Low-power 32-bit ARM(R)-SC100TM Enhanced RISC Architecture * Von Neumann Load / Store Architecture * * * * *
- single 32-bit Data Bus for Instructions and Data Memory Protection unit Internal Oscillator (VFO) (up to 50 MHz) ESD Protection to 2000V ( 6000V on the ISO interfaces) Operating Ranges: 3.3V (+/- 10%) Compliant with EMV Level 1, VISA PED, APACS, ZKA, Common Criteria (EAL4+), FINREAD
Memory
* 256 bits of Key Storage (battery backup) * 32K Bytes of internal ROM Memory (Bootstrap & Crypto library) * 256K Bytes of Internal EEPROM, Including 128 OTP Bytes and 384-byte Bitaddressable Bytes - 1 to 128-byte Program/Erase - 2 ms Program, 2 ms Erase - Endurance: 100,000 Write/Erase Cycles at temperature of 25 degrees C - 10 Years Data Retention * 100K Bytes of Internal RAM (4KB Crypto RAM) * up to 16M Bytes of External Memory (AT91SO100/101 only)
Secure Microcontroller for Electronic Transaction Terminal / Reader AT91SO100/101 AT91SO50/51 AT91SO25 Summary
Peripherals
* Page Unit to access External Memory Page (AT91SO100/101 only) * Static Memory Controller (AT91SO100/101 only) * Two ISO 7816 controllers with DC/DC (one of them can be multiplexed to address 4 * * * * * * * * * * * * * * *
SAM). The DC/DC converter AT83C26 is not included in the versions AT91SO100, AT91SO50 and AT91SO25. But the two ISO 7816 controllers are still available USB 2.0 Full Speed (8 endpoints) SPI Controller (up to 6Mbps) and Two Wire Interface Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) Triple Track Magstripe Logical Interface 5 8-bit I/O Port Interface (LEDs, Keyboard, LCD, spare...) Real Time Clock (RTC) with Alarm interrupt System Timer including a 16-bit Counter, Watchdog and Second Counter Six-channel 16-bit Timer/counter 2-level, 28-interrupt Controller Hardware DES and Triple DES DPA Resistant Hardware AES 128-192-256 Hardware SHA-1, SHA-256 True Random Number Generator (RNG) Two CRC 16 Engines and one CRC 32 Engine (Compliant with ISO/IEC 3309) AdvX - Advanced crypto multiplier for cryptography and authentication (including RSA, DSA, Key Generation, ECC)
Security
* * * * * * *
Dedicated Hardware for Protection Against SPA/DPA Attacks Advanced Protection Against Physical Attack, Including Active Shield Intrusion sensors (mesh and switches). Environmental Protection Systems (Voltage, Frequency, UV andTemperature) Secure Memory Management/Access Protection (MPU) Real time clock and battery back up Compliant with EMV standard, VISA PED and FINREAD
6514BS-SPD-10 May 07
Note: This is a summary document. A complete document will be available under NDA. For more information, please contact your local Atmel sales office.
Description
The AT91SO100/101, AT91SO50/51 and the AT91SO25 are a low-power, high-performance, SC100 32-bit microcontroller based on the ARM(R) enhanced RISC architecture. This new SC100 core allows the linear addressing of up to 1M bytes of code and data as well as a number of new functional and security features. A 3-level instruction pipeline allows the performance of one instruction in a single clock cycle, the SC100 achieves throughputs close to 1 MIPS per MHz. The SC100 processor employs a unique architectural strategy known as Thumb(R) a super reduced instruction set that is ideally suited for high volume applications with memory restrictions and applications where code density is an important factor. The AT91SO100/101, AT91SO50/51 and the AT91SO25 have internal EEPROM that can be used as program or data memory. It also includes a ROM (for the bootstrap and crypto library and some native functions) and a large SRAM. The AT91SO100/101 can also address up to 16Mbytes of external memory. The AT91SO100/101, AT91SO50/51 and the AT91SO25 also comprises of strong security mechanisms and has a impressive set of crytography features , hardware DES/TDES, hardware AES, hardware SHA-n, hardware cryptography accelerator for asymmetric algorithms (RSA, Elliptic Curve, Key generation) and a true random number generator. The AT91SO100/101, AT91SO50/51 and the AT91SO25 includes a lot of dedicated peripherals as ISO 7816 controller and mag-
netic stripe card interface, as well as USB, SPI, TWI, USARTs and I/O ports.
The AT91SO101 is a single package solution in BGA256 embedding two chips, the secure controller and the AT83C26 which physically interface with up to 2 smart cards and 3 secure access module, or 1 smart card and 4 secure access module. The AT91SO100 is available using the same package (BGA256) pin to pin compatible with the AT91SO101 but without the AT83C26. The AT91SO51 is a single package solution in BGA208 (cost effective solution) embedding two chips, the secure controller and the AT83C26 which physically interface with up to 2 smart cards and 3 secure access module, or 1 smart card and 4 secure access module. The external bus is not connected on this product. The AT91SO50 is available using the same package (BGA208) pin to pin compatible with the AT91SO51 but without the AT83C26. The external bus is not connected on this product. The AT91SO25 is a single package solution in BGA144 (low cost solution) embedding one chip, the secure controller only. The external bus is also not connected on this product.
2
AT91SO100
6514BS-SPD-10 May 07
AT91SO100
Figure 1. Block Diagram (Secure controller)
Intrusion Switch Sensors
CP15 (MPU)
256 bit User Key
Security
Intrusion Mesh Sensors
Page Unit
A0 - A23 D0 - D15 CS0 - CS3 nrd nwe_nwe0 nbs1_nwe1 ext_nwait DPRAM
SCK MOSI MISO NSS
24 16 4
ARM SC100
USB
Clock Management 48 MHz
6 Mhz
SMC
ROM 32 KB EEPROM 256 KB RAM 96 KB
Crypto RAM 4KB
Interrupt Controller
System Timers Power Management
32KHz from RTC
VBat Vcc
SPI USB Device USART0
RTC
32.768 Khz
USB + USB -
8 bits PortA
USART1
IO, CLK, VCC, RST, C4, C8, Card_Pres IO, CLK, VCC, RST IO, CLK, VCC, RST IO, CLK, VCC, RST IO, CLK, VCC, RST
Smart Card interface 0
ADVX Crypto Coprocessor RSA, ECC
8 bits PortB
8 bits PortC Smart Card Interface 1 RNG 16 bit Timer/Counter TC0 TC1 Channel0 Channel0 MAGSTRIPE AES SHA Channel1 Channel1 Channel2 Channel2 BRIDGE 8 bits PortE
DES / TDES
8 bits PortD
CRC 16/32
3
6514BS-SPD-10 May 07
Figure 2. BGA256 (AT91SO100/101)
All dimensions are in mm
4
AT91SO100
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AT91SO100
Figure 3. BGA208 (AT91SO50/51)
5
6514BS-SPD-10 May 07
Figure 4. BGA144 (AT91SO25)
6
AT91SO100
6514BS-SPD-10 May 07
Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
Atmel Operations
Memory
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Japan
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Literature Requests
www.atmel.com/literature
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL'S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL'S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Atmel's products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
(c) Atmel Corporation 2007. All rights reserved. Atmel(R), logo and combinations thereof, Everywhere You Are (R) and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.
6514BS-SPD-10 May 07


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